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| DN2470 N-Channel Depletion-Mode Vertical DMOS FET Features High input impedance Low input capacitance Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage General Description The DN2470 is a low threshold depletion-mode (normally-on) transistor utilizing an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FET is ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications Normally-on switches Solid state relays Converters Linear amplifiers Constant current sources Battery operated systems Telecom Ordering Information BVDSX/BVDGX 700V RDS(ON) (max) 42 IDSS(min) 500mA Package Options TO-252 (D-PAK) DN2470K4-G Absolute Maximum Ratings Parameter Drain-to-source voltage Drain-to-gate voltage Gate-to-source voltage Operating and storage temperature Soldering temperature* Value BVDSX BVDGX 20V -55OC to +150OC 300OC Package Option Drain Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. *Distance of 1.6mm from case for 10 seconds. Gate Source TO-252 (D-PAK) (top view) DN2470 Thermal Characteristics Package TO-252 ID (continuous)1 170mA ID (pulsed) 500mA Power Dissipation @TA = 25OC 2.5W2 jc (OC/W) 6.25 ja (OC/W) 502 IDR1 170mA IDRM 500mA Notes: 1. ID (continuous) is limited by max rated Tj. 2. Mounted on FR4 board, 25mm x 25mm x 1.57mm Electrical Characteristics Symbol Parameter Min Typ Max Units Conditions BVDSX VGS(OFF) VGS(OFF) IGSS ID(OFF) IDSS RDS(ON) RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr Drain-to-source breakdown voltage Gate-to-source OFF voltage Change in VGS(OFF) with temperature Gate body leakage current Drain-to-source leakage current Saturated drain-to-source current Static drain-to-source ON-state resistance Change in RDS(ON) with temperature Forward transconductance Input capacitance Common source output capacitance Reverse transfer capacitance Turn-ON delay time Rise time Turn-OFF delay time Fall time Diode forward voltage drop Reverse recovery time 700 -1.5 100 - 500 800 -3.5 4.5 100 1.0 1.0 42 1.1 540 60 25 30 45 45 60 1.8 - V V mV/ C nA A mA mA %/OC mmho pF O VGS = -5.0V, ID = 100A VDS = 25V, ID = 10A VDS = 25V, ID = 10A VGS = 20V, VDS = 0V VDS = Max rating, VGS = -10V VDS = 0.8 Max Rating, VGS = -10V, TA = 125OC VGS = 0V, VDS = 25V VGS = 0V, ID = 100mA VGS = 0V, ID = 100mA VDS = 10V, ID = 100mA VGS = -10V, VDS = 25V, f = 1MHz ns VDD = 25V, ID = 100mA, RGEN = 25, VGS = -5.0V, ISD = 200mA VGS = -5.0V, ISD = 200mA V ns Notes: 1.All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2.All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V VDD RL OUTPUT 90% INPUT -10V 10% t(ON) PULSE GENERATOR t(OFF) tr td(OFF) tF RGEN td(ON) VDD 10% 10% INPUT D.U.T. OUTPUT 0V 90% 90% 2 DN2470 3-Lead TO-252 D-PAK Package Outline (K4) A c2 E E1 L3 4 1 H D D1 1 2 3 L4 L5 Detail B b2 e b Side View Front View Rear View Gauge Plane L2 L L1 A1 Seating Plane Detail B Notes: 1. 4 terminal locations are shown, only 3 are functional. Lead number 2 was removed. Symbol MIN Dimension (inches) NOM MAX A .086 .094 A1 .005 b .025 .035 b2 .030 .045 c2 .018 .035 D .235 .240 .245 D1 .205 - E .250 .265 E1 .170 - e .090 BSC H .370 .410 L .055 .060 .070 L1 .108 REF L2 .020 BSC L3 .035 .050 L4 .040 L5 .045 .060 0 O 1 0O O 10 15O JEDEC Registration TO-252, Variation AA, Issue E, June 2004. Drawings not to scale. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-DN2470 A012307 3 |
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